Research Themes

Theme 1:
EMERGING NANODEVICES
Leader: Supratik Guha (Univ. of Chicago)
Goal#1) Demonstrate low-power, capacitively coupled oscillator arrays (>1000 nodes) and compact spiking neurons using phase transitions that are integrated with silicon CMOS; 2) Demonstrate cross-point synaptic memories with extremely low programming voltages and currents, integrated with silicon CMOS.

Theme 2:
CIRCUIT-DEVICE CO-DESIGN 
Leader: Arjit Raychowdhury (Georgia Tech)
Goal#1) Integrate coupled dynamical systems based on post-CMOS devices into silicon integrated circuits, Dynamical Core Chip (DCC); 2) Interface DCC with Integrated Interface Chip (IIC) to allow for communication with Boolean digital core; 3) Demonstrate solution of convex and combinatorial optimization problems with dynamical systems; 4) Demonstrate brain-inspired dynamical systems for energy-efficient neuromorphic computing and unsupervised learning. 

Theme 3:
THEORY OF COLLECTIVE COMPUTING
Leader: Zoltan Toroczkai (Notre Dame)
Goal# 1) Develop biomimetic unsupervised learning algorithms for EXCEL dynamical systems; 2) Study mathematical techniques to solve optimization problems by recasting them as nonlinear dynamical systems, whose fixed points (attractors) correspond to local or global minimizers; 3) Implement general classes of continuous optimization programs (e.g., linear and quadratic programs) on EXCEL dynamical systems; 4) Explore discrete optimization problems (NP complexity) whose solutions are hard to compute digitally, but can be potentially solved by the dynamics of coupled systems; 5) Advance a comprehensive theory of analog computational complexity using the nomenclature of dynamical systems.

Theme 4:
NON-BOOLEAN ARCHITECTURE PLATFORM
Leader: Xiaobo Sharon Hu (Notre Dame)
Goal#1) Construct comprehensive simulation framework for EXCEL dynamical core chip (DCC) based system architecture to validate system functionality and project performance, energy and robustness figure-of-merit. 2) Explore (with T5) the design space of the EXCEL dynamical system for mapping real-world applications to the architecture with seamless interface to digital CMOS support fabric.

Theme 5:
APPLICATIONS AND BENCHMARKING
Leader: Michael Niemier (Notre Dame)
Goal# 1) Move beyond benchmarking at the device and circuit levels (i.e., adders, MAC units, latches) and quantify how EXCEL collective dynamics improves energy-performance FoM (figures of merit) of a computational primitive (e.g. for convex optimization) and application-level task (e.g. real-time image analysis). 2) Analysis should incorporate the energy, delay, and accuracy associated with the computation itself, and necessary overheads such as input, output, readout and memory accesses.